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You are here: OSU8 Microprocessor Schematic OSU8 Core 8-Bit Data ALU Misc Logic 3:1 Mux

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OSU8 Microprocessor Overview CPU Programming Hardware Info Schematic Xilinx Implementation Address Decoder OSU8 Core Normal Size Large Size 8-Bit Data ALU ALU-8 Main 8-Bit Adder 8-Bit Shifter 8-Bit 3:1 Mux Function Dec N & Z Bits 8-Bit AND 8-Bit OR Zero A Zero B Compare A Compare B Misc Logic Full Adder 2:1 Mux 3:1 Mux 4:1 Mux 2:1 Mux 3:1 Mux 16-Bit Addr ALU Control State Machine State Register Bus Control Accumulator B Register Status Bits Operand Register Program Counter Stack Pointer P1 Pointer P2 Pointer 16-Bit Equals Temp Register 8-Bit Zero Buffers Full Hierarchy Index Implementation Download Files

3-input MUX

Return to 8-bit Shifter

Complete List of All OSU8 Schematics