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OSU8 Microprocessor
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Over a period of about six months, the project came together and was, more or less, a success. The Xilinx-based hardware actually ran some code, but would crash after several dozen instructions. Gate-level simulation would run code correctly. Perhaps someday I'll revisit the project and troubleshoot the real hardware, and maybe even fab the full-custom CMOS chip.
These web pages are an attempt to document the project, and make the design and software tools available publicly (for free). All of the OSU8 design material presented here is an original work by Paul Stoffregen and has been placed in the public domain. This material is provided in the hope that it will be useful, but without any warranty, not even a warranty of merchantability or fitness for a particular purpose.
With the definition and software tools, I designed the ALU and data path circuitry. These require many control signals. Several attempts were made to design the control state machine, which ultimately showed the need to create a microcode programming language. With this tool, I wrote the microcode that describes how the control state machine will cause the hardware to execute code. Turning the crank of logic synthesis produced the control circuitry, completing the hardware design.
The complete schematic (extracted from screen captures) is on-line, and also has a map to make navigating it a bit easier.
The first verification was simulation of code execution. With a functional design, I built a Xilinx-based board, which was able to run some code, though not reliably. Some initial work has been done to create a full-custom CMOS implementation.
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