OSU8 Microprocessor

PJRC.COM Offline Archive, February 07, 2004
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You are here: OSU8 Microprocessor Schematic OSU8 Core 16-Bit Addr ALU Full Addr Search PJRC

OSU8 Microprocessor

Overview
CPU Programming
Hardware Info
Schematic

Xilinx Implementation
Address Decoder
OSU8 Core

Normal Size
Large Size
8-Bit Data ALU
16-Bit Addr ALU

ALU-16 Main
Full Addr

Control State Machine
State Register
Bus Control
Accumulator
B Register
Status Bits
Operand Register
Program Counter
Stack Pointer
P1 Pointer
P2 Pointer
16-Bit Equals
Temp Register
8-Bit Zero
Buffers

Full Hierarchy Index

Implementation
Download Files

Single Bit Full Adder

The 16-bit ALU uses 16 of these full adder circuits, in a ripple adder configuration. ALU16 maniplates the carry bit between its second and third instance of this adder, when it executes the functions that compute branch targets.

Because these adders are used in a ripple carry in ALU-16, (as they are also used within ALU8's adder), the addition is the slowest portion (timing critical path) of OSU8's circuitry. For Xilinx, this should probably use the fast-carry logic within the Xilinx CLBs, or custom CMOS this should probably be a Manchester carry or carry-lookahead type adder.

Schematic Drawing

OSU8: Simple 8-Bit Microprocessor Design; Paul Stoffregen
http://www.pjrc.com/tech/osu8/sch/my_fadd_alu16.html
Last updated: November 28, 2003
Status: These pages are a work-in-progress
Comments, Suggestions: <paul@pjrc.com>

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Complete List of All OSU8 Schematics