Fourth Order Low-Pass Filter IC Layout

PJRC.COM Offline Archive, February 07, 2004
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CMOS Layout

The "Decimator" Chip Layout

This layout preview image is also available in medium, large, and huge sizes.

Files to Download

Magic 6.3 Layout (CMOSN rules), in ZIP or GZIP format.
CIF Format Layout, in ZIP or GZIP format.
CMOSN tech file for Magic, in ZIP or GZIP format.

Fourth Order Low-Pass Filter IC with Decimation Factor of 32 (aka "The Decimator")
Paul Stoffregen - Circuit Design, IC Layout, Spice Simulation
Shivani Gupta - Schematic Entry, Switch-Level Simulation
Srinivas Pattamatta (aka PVS) - Spice Simulation, Fiddling with CAD Software
Richard Schreier - Project Specification, Architecture Outline, Free Pizza
http://www.pjrc.com/tech/decm/layout.html
Last updated: June 20, 2003
Suggestions, comments, criticisms?? Paul, Shivani, PVS, Richard