8-bit serial input shift register





This register shifts the data bit at D into


the parallel output at pin 1. At each clock


pulse the parallel output shifts one bit with


the high order bit 8 lost in the shifting.


The following provides an example of this


shifting process.





Clk | D | P1 P2 P3 P4 P5 P6 P7 P8


----|---|-------------------------


 0  | 1 |  0  0  0  0  0  0  0  0


 1  | 0 |  1  0  0  0  0  0  0  0


 2  | 0 |  0  1  0  0  0  0  0  0


 3  | 1 |  0  0  1  0  0  0  0  0


 4  | 0 |  1  0  0  1  0  0  0  0


 5  | 0 |  0  1  0  0  1  0  0  0


 6  | 0 |  0  0  1  0  0  1  0  0


 7  | 1 |  0  0  0  1  0  0  1  0


 8  | 1 |  1  0  0  0  1  0  0  1


 9  | 0 |  1  1  0  0  0  1  0  0





Clocking is accomplished on the low- to high


level edge of the clock pulse. A direct reset


input overrides all other inputs, including


the clock, and sets all flip-flips to zero.





To move this device to another position,


click inside the body of the device, and while


holding the mouse button down, drag the


device to the new position. Then release


the mouse button.








