Timing of Instructions, Continued

UMBC CMSC 211 Fall 1999

Timing of Instructions, Continued

The cmp instruction is a sub that does not store its result, and can be treated like a sub in terms of timing. One point, though, is that when a jump is taken, the prefetch buffer is drained and reloaded from scratch. Thus if you have a choice, it might be more efficient to try to arrange it so that conditional jumps are usually not taken.

Instructions are measured in the number of clock cycles it takes to perform the function. Clocks can be converted to nanoseconds by dividing one microsecond by the number of megaHertz at which the number of megaHertz at which the processor is running. For example, on a computer running at 8 MHz, 1 clock takes 125 nanoseconds (1000 MHz per nanosecond / 8 MHz). At 500 MHz, it takes 2 nanoseconds for that cycle.

Additionally, it depends on which model of the 80X86 family that the instruction runs on. Comparing two registers on 88/86 takes 3 clock cycles, while on the 486, it takes 1 clock cycle. which model of the 80X86 family you

Jump instructions are a little more interesting. In order to speed up executtion, the Pentium CPU has a pre-fetch buffer that fetches a whole block of memory that it thinks will be the next instructions executed. The CPU keeps a table of the most recent program branches and whether or not they were taken, and guesses that the current jump will go the same way it has in the past. The CPU then fills a second pre-fetch buffer from that destination (if necessary). If it guesses right, the jump takes one cycle. If it is wrong, the buffers must be refilled and the jump takes several cycles.

This behavior is precisely what you would want for optimizing loops, which in turn are the most important parts of a program to optimize. Generally the loop termination test is performed n+1 times, with all but the last one going the same way.

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