UMBC CMSC 211 |
address | machine language | assembly language |
---|---|---|
0005 | 8B 1E 0002 R | mov bx, Y |
0009 | 81 C3 024B | add, bx, 587 |
000D | 89 1E 0004 R | mov Z, bx |
The assemblers translate each instruction into a sequence of one or more bytes. Each instruction has an op-code byte. While it is normally the first byte in the sequence, some instructions have a prefix byte.
Some instructions has only one byte in length, such as CBW and CWD. Some are two bytes in length, such as INT which has one byte for the opcode and one byte for the interrupt number for an argument.
Most other instructions have one or two operands. These operaands can be registers, memory locations, or immediate values. The instructions require a second byte that is called the mod r/m byte, which specifies the type of operands. If one or both of the operands is a register, the actual register(s) by the r/m byte itself. If an operant is a memory location, the mod r/m byte is followed by the two-byte address of the operand.
cwd
cbw
opcode |
inc/dec/neg/mul/div register
mov/add/sub register, register
opcode | mod r/m |
inc/dec/neg/mul/div memory
mov/add/sub memory, register
mov/add/sub/ register, memory
opcode | mod r/m | address1 | address2 |
mov/add/sub register, byte constant
opcode | mod r/m | const1 |
mov/add/sub register, word constant
opcode | mod r/m | const1 | const2 |
mov/add/sub memory, byte constant
opcode | mod r/m | address1 | address2 | const1 |
mov/add/sub memory, word constant
opcode | mod r/m | address1 | address2 | const1 | const2 |
To get the corresponding double word instructions, a word instruction is prefixed by a special byte value that indicates to the CPU that the next instruction has double word operands. For instances, the instruction
where L is a double word, would be nine bytes long, one for the prefix, one for the opcode, one for modr/m, two for the address and four for the constant.