UMBC CMSC 313 -- Assembly Language Segment Previous | Next

Registers

We know that registers are the highest-speed scratch pads located inside the CPU. Whenever the data is in a register, we want to use it instead of getting a copy from memory so that we can take advantage of the performance.

Changing the copy of a variable that is in a register does not change the copy of the variable that is in member! The register copy is a very temporary copy that will be destroyed!

Introducing The Registers

General-Purpose Registers

The documentation on the Pentium states that there are eight general-purpose registers, but don't believe it. (Maybe it is general-purpose in their classification system, but not in mine!)

General-Purpose Registers

 
32-bit Name 16-bit Name 8-bit Names Additional Purpose Notes
EAX AX AH, AL Also used as the accumlator  
EBX BX BH, BL Also used as the base index register  
ECX CX CH, CL Also used as the counter register  
EDX DX DH, DL Also used as the I/O pointer  
ESI SI none Indexing register used to point to the source  
EDI DI none Indexing register used to point to the destination  
EBP BP none Used as the Frame Pointer When mixing assembly language and any other language, DO NOT use this register
ESP SP none Stack Point. DO NOT USE THIS REGISTER FOR ANYTHING!

In the case of the EAX, EBX, ECX, and EDX registers if you change the [A-D]H or [A-D]L, you change the [A-D]X and the E[A-D]X registers! Also if you change the 16-bit register, you change the 32-bit register, since the bottom half the of the 32-bit register is the 16-bit register!

Segment Registers

Name Segment Notes
CS Code  
DS Data  
SS Stack  
ES Extra Segment register  
FS Extra Segment register  
GS Extra Segment register  

EFLAGS Registers

The EFLAGS Register does not contain a single value. Rather, it is a collection of unrelated bits, each one used to signify a condition. The bit is called a flag. Not all 32 bits are currently in use, but the Intel manuals has a warning about those that are not defined: "DO NOT USE. Always set to values previously read"

There are only 17 defined, and in this class, we are only concerned with four. The following detailed information is provided by Intel.

Primary Flags
Bit ID Long Name Purpose and Notes
0 CF Carry Flag Set if an arithmetic operation generates a carry or a borrow out of the most-significant bit of the result; cleared otherwise. This flag indicates an overflow condition for unsigned-integer arithmetic. It is also used in multiple-precision arithmetic.
6 ZF Zero Flag Set if the result is zero; cleared otherwise.
7 SF Sign Flag Set equal to the most-significant bit of the result, which is the sign bit of a signed integer. (0 indicates a positive value and 1 indicates a negative value.)
10 DF Direction Flag Controls the String instructions. Setting the DF flag causes the string insturctions to auto- decrement (that is, to process strings from high addresses to low addresses). Clearing the DF flag causes the string instructions to auto-increment (process strings from low addresses to high addresses).

Instruction Pointer (EIP) register

The EIP register contains a 32-bit pointer to the next instruction to be executed (NOT the current instruction!) The location of the next instruction is a piece of information that we want to be able to save and do something else first! This is how we invoke another function. It is also how to implement repetition and selection. Without it, all we have is sequential flow control!

©2004, Gary L. Burt

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