Class Schedule
CMSC 611 (Fall 1998)
This schedule is tentative and may change as we go along. Note that you are responsible for reading the listed material
before it's discussed in class.
- Measuring Performance & Cost (1 week)
Readings: H&P, Chapter 1
- Performance measurement
- Benchmarks
- Costs of building computers
- Price/performance
- Instruction Sets (1 week)
Readings: H&P, Chapter 2
- Classifying instruction sets
- Interactions between languages and instruction sets
- Measuring instruction set usage
- Instruction set examples
- Improving CPU Performance: Pipelining (2 weeks)
Readings: H&P, Chapter 3
- Basic pipelining
- Data & control hazards
- Improving CPU Performance: Advanced Techniques (3 weeks)
Readings: H&P, Chapter 4 (except 4.8)
- Dynamic instruction scheduling
- Branch prediction
- Instruction-level parallelism
- Vector Processors (1.5 weeks)
Readings: H&P, Appendix B
- Vector architecture & design
- Vector performance
- Memory Hierarchies (2 weeks)
Readings: H&P, Chapter 5
- Evaluating memory hierarchy performance
- Cache design & optimization
- Virtual memory design
- Memory protection
- Memory coherency
- Storage Systems (2 weeks)
Readings: H&P, Chapter 6
- Types and uses of storage devices
- Interfacing I/O to the rest of the system
- Reliability and availability
- I/O system design
- Multiprocessors (1 week)
Readings: H&P, Chapter 8
- Classifying parallel architectures
- Centralized vs. distributed shared memory
- Interconnection topologies
- Synchronization
- Memory consistency
- Class Project Presentations (1 week)